
Time
Click Count
On 28 April 2026, the International Electrotechnical Commission (IEC) published IEC 62368-3:2026 — a new standard specifically addressing electromagnetic noise suppression requirements for ferrite cores used in AI accelerator servers. This update introduces mandatory common-mode noise attenuation limits (≤−45 dB at 5 GHz) across the 1–10 GHz frequency band. The standard takes effect on 1 January 2027 and has already been referenced in design specifications by NVIDIA and AMD for next-generation AI servers — making it highly relevant for manufacturers, component suppliers, and system integrators serving the high-performance computing and AI infrastructure sectors.
The IEC officially released IEC 62368-3:2026 on 28 April 2026. Titled Audio/Video, Information and Communication Technology Equipment — Part 3: Particular Requirements for AI Accelerator Servers, this is the first edition of the standard. It establishes a new requirement for ferrite cores: minimum common-mode noise suppression performance of ≤−45 dB at 5 GHz within the 1–10 GHz range. Compliance becomes mandatory from 1 January 2027. The standard is explicitly cited in the hardware design guidelines of NVIDIA and AMD for upcoming AI server platforms.
Ferrite core manufacturers are directly affected because the standard introduces a measurable, frequency-specific performance threshold not previously codified in IEC 62368-1 or IEC 62368-2. Impact manifests in product validation protocols, material formulation adjustments, and test method alignment with the new 1–10 GHz band — particularly around 5 GHz.
System-level designers must now verify ferrite core performance against the new limit during board-level EMC validation. Since NVIDIA and AMD have adopted the standard into their reference designs, non-compliant cores may lead to certification delays or redesign cycles before mass production.
Purchasing functions face revised qualification criteria for magnetic components. Previously accepted ferrite parts may require retesting or replacement if they lack documented 1–10 GHz common-mode attenuation data — especially at the 5 GHz anchor point.
Laboratories supporting ICT equipment certification must update test setups to cover the 1–10 GHz range for common-mode noise on power and signal lines using ferrite suppression components. Calibration procedures and measurement uncertainty budgets will need verification against the new requirement.
While the standard enters force globally on 1 January 2027, regional regulatory bodies (e.g., CENELEC in Europe, ANSI in the U.S.) may issue harmonized versions or transitional provisions. Stakeholders should track national standards bodies for alignment notices and potential phased enforcement schedules.
Manufacturers and buyers should request updated test reports from suppliers — specifically covering common-mode insertion loss (or suppression) measurements between 1 GHz and 10 GHz, with emphasis on 5 GHz. Legacy datasheets without this data may no longer support compliance claims post-2027.
The fact that NVIDIA and AMD reference IEC 62368-3:2026 in internal design specs signals early market pull — but does not replace formal regulatory acceptance. Companies should treat vendor requirements as de facto technical prerequisites while separately preparing for regulatory conformity assessment under applicable national frameworks.
Engineering, procurement, quality assurance, and compliance teams should jointly review existing BOMs for ferrite-dependent subsystems (e.g., PCIe power delivery, GPU interconnects). Where gaps exist, initiate supplier engagement and update internal test SOPs to include the new frequency band prior to Q4 2026.
Observably, IEC 62368-3:2026 reflects a structural shift: safety and EMC standards are evolving to address architecture-specific challenges in AI infrastructure — rather than treating all ICT equipment uniformly. Analysis shows this is less a standalone compliance milestone and more an indicator of how rapidly AI hardware is driving granular, application-layer standardization. From an industry perspective, the early adoption by leading silicon vendors suggests the requirement is technically grounded in real-world noise issues observed in high-bandwidth, high-power AI server deployments. Current monitoring should focus less on whether the limit will change, and more on how test methodologies, material science, and supply chain traceability adapt to its operational implementation.
This standard does not yet represent a finalized global regulatory regime — but it is functionally shaping design priorities today. Its significance lies not only in the technical threshold itself, but in the precedent it sets: future revisions of IEC 62368 may increasingly include annexes or parts targeting domain-specific hardware classes (e.g., liquid-cooled systems, optical interconnect modules).
IEC 62368-3:2026 marks the formal standardization of high-frequency noise suppression expectations for ferrite cores in AI accelerator servers. It is best understood not as an isolated regulatory update, but as an early institutional response to electromagnetic integrity challenges emerging at scale in AI data centers. For stakeholders, the priority is pragmatic readiness — validating components, aligning test capabilities, and coordinating across engineering and procurement — rather than waiting for full regulatory rollout. The timeline remains actionable: key preparatory steps should be completed well before the 1 January 2027 enforcement date.
Main source: International Electrotechnical Commission (IEC), IEC 62368-3:2026, published 28 April 2026.
Additional context: Publicly confirmed references in NVIDIA and AMD AI server hardware design documentation (as reported in official vendor platform briefings, April 2026).
Note: National adoption status and harmonization timelines remain subject to ongoing observation through regional standards bodies.
Recommended News
Join 50,000+ industry leaders who receive our proprietary market analysis and policy outlooks before they hit the public library.